DSAEDA000132591.pdf by Cypress Semiconductor

Partial File Text CY7C2268KV18, CY7C2270KV18 36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT 36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
Price & Stock Find it at Findchips.com

DSAEDA000132591.pdf preview Download Datasheet