DSAEDA000132824.pdf by Cypress Semiconductor

Partial File Text CY7C1318KV18, CY7C1320KV18 18-Mbit DDR II SRAM Two-Word Burst Architecture 18-Mbit DDR II SRAM Two-Word Burst Architecture Features Configurations I 18-Mbit density (1 M Ã 18, 512 K
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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