DSAEDA000132905.pdf by Cypress Semiconductor

Partial File Text CY7C1161KV18, CY7C1176KV18 CY7C1163KV18, CY7C1165KV18 18-Mbit QDRÂ® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) Configurations Features I Separate independent read and
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RoHS Unknown
Pb Free Unknown
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