DSA00380892.pdf by Alliance Semiconductor

Partial File Text March 2001 AS4LC4M4E0 AS4LC4M4E1 ® 4Mx4 CMOS DRAM (EDO) Family Features · Refresh - 4096 refresh cycles, 64 ms refresh interval for AS4LC4M4E0 - 2048 refresh cycles, 32 ms refresh interval
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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AS4LC4M4E0-50JC AS4LC4M4E0-50JI AS4LC4M4E0-50TC AS4LC4M4E0-50TI AS4LC4M4E0-60JC AS4LC4M4E0-60JI AS4LC4M4E1-60JC