DSA00512697.pdf by Agere Systems

Partial File Text Data Sheet March 28, 2002 TRCV0110G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features s s s Integrated limiting amplifier with 8 mV sensitivity at 1 x 10
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1 into 12 demultiplexer circuit diagram 10Gb CDR APD-SBSC-101 GR-253 N4 Amplifier pin diagram 14 demultiplexer TRCV0110G