DSA00515054.pdf by Sony

Partial File Text JCDMA CXG1207AK CXG1207AKp-Gate HFET (JCDMA) VDD1 = VDD2 = 3.5V, VREF = 2.9V CTL1 = 2.6V, CTL2 = 0.0V (High Power Mode) CTL1 = 0.0V, CTL2 = 2.6V (Low Power Mode) 0.030cc (4.5mm × 4.
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