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DSA00270743.pdf
by Cypress Semiconductor
Partial File Text
FastEdgeTM Series CY2DP3110 1 of 2:10 Differential Clock/Data Fanout Buffer Features Functional Description · Ten ECL/PECL differential outputs · One ECL/PECL differential or single-ended
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Original
RoHS
No
Pb Free
No
Lifecycle
Obsolete
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CY2DP3110AXIT
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CY2DP3110
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