DSARS0011034.pdf
by Cypress Semiconductor
-
CY7C1328G
4-Mbit (256 K × 18)
Pipelined DCD Sync SRAM
4-Mbit (256 K × 18) Pipelined DCD Sync SRAM
Features
Functional Description
Optimal for performance (double-cycle deselect)
-
Original
-
Unknown
-
Unknown
-
Unknown
-