DSAIH00051713.pdf by Not Available

Partial File Text 3.3 V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES: 0.5 MICRON CMOS Technology Typical tsK(O) (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V u
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