DSA00518257.pdf by PhaseLink

Partial File Text PLL520-40 CMOS Low Phase Noise VCXO (for 65-130MHz Fund Xtal) FEATURES DIE CONFIGURATION VDD VDD VDD VDD N/C DRIVE_SEL^ Reserved 22 21 20 19 18 (1550,1475)
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C502A PLL520-40 PLL520-40DC

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