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    DSA00518259.pdf by PhaseLink

    • PLL520-80 Low Phase Noise VCXO (9.5-65MHz) DIE CONFIGURATION FEATURES OUTSEL0^ VDD VDD VDD VDD N/C Reserved OUTSEL1^ 24 23 22 21 20 19 18 17 N/C
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    a2020 C502A E5500 PLL520-80
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