DSASW0097487.pdf by Synopsys

Partial File Text Inferring Actel RTAX-DSP MATH Blocks Actel® RTAX-DSP devices support 18x18-bit signed multiply-accumulate blocks. The architecture includes dedicated components called RTAX-DSP MATH blocks, which can
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18x18-Bit 35x35-Bit 8 bit multiplier VERILOG 8 bit sequential multiplier VERILOG 8 bit unsigned multiplier using vhdl code C2009 hapstrak RTAX2000 RTAX2000D sequential multiplier Vhdl Synplicity* haps vhdl code for 18x18 SIGNED MULTIPLIER vhdl code for 18x18 unSIGNED MULTIPLIER