This site uses third-party website tracking technologies to provide and continually improve our services, and to display advertisements according to users' interests. I agree and may revoke or change my consent at any time with effect for the future.
Datasheet
PD48288109A PD48288118A
288M-BIT Low Latency DRAM Separate I/O
Description
The PD48288109A is a 33,554,432-word by 9 bit and the PD48288118A is a 16,777,216-word by 18 bit synchronous