DSA00391934.pdf by Maxim Integrated Products
- 19-2511; Rev 1; 7/02 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features o 50ps (max) Output-to-Output Skew o 1.5psRMS (max) Random Jitter o Guaranteed 300mV Differential Output
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