DSA0041461.pdf by Alliance Semiconductor

Partial File Text AS4LC256K16EO ® 3.3V 256K X 16 CMOS DRAM (EDO) Features · EDO page mode · 5V I/O tolerant · 512 refresh cycles, 8 ms refresh interval · Organization: 262,144 words × 16 bits · High speed
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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AS4LC256K16E0-35JC AS4LC256K16EO AS4LC256K16EO-35 RAS-28

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