DSASW00110620.pdf
by Analog Devices
- 1.8 V, 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer ADCLK846 FEATURES FUNCTIONAL BLOCK DIAGRAM ADCLK846 LVDS/CMOS OUT0 (OUT0A) OUT0 (OUT0B) VREF OUT1 (OUT1A) CLK OUT1 (
- Original
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- Active
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