DSARS004939.pdf by Cypress Semiconductor

Partial File Text CY7C1231F 2-Mbit (128K x 18) Flow-through SRAM with NoBLTM Architecture Functional Description[1] Features · Can support up to 117-MHz bus operations with zero wait states -- Data is transf
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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CY7C1231F CY7C1231F-100AC CY7C1231F-117

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