DSAH00133450.pdf by Cypress Semiconductor
- 144-Mbit QDR II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) 144-Mbit QDR ® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) CY7C1663KV18, CY7C1665KV18 ® Features
- Original
- Unknown
- Unknown
- Unknown
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