DSAAQ0031283.pdf
by Cypress Semiconductor
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CY7C2644KV18
144-Mbit QDR® II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) with ODT
144-Mbit QDR ® II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) with ODT
Features
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Original
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Unknown
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Unknown
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Unknown
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