DSAH00554182.pdf by STMicroelectronics

Partial File Text SPEAr1340 Dual-core Cortex A9 HMI embedded MPU Datasheet - preliminary data Features CPU subsystem: 2x ARM Cortex A9 cores, up to 600 MHz 32+32 KB L1 caches per core, with parity check
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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