DSA007592.pdf by Philips Semiconductors

Partial File Text 74HC137 3-to-8 line decoder, demultiplexer with address latches; inverting Rev. 03 -- 11 November 2004 Product data sheet 1. General description The 74HC137 is a high-speed Si-gate CMOS devi
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3 TO 8 DECODER 3 to 8 line decoder 74HC137 74HC137D 74HC137DB 74HC137N circuit diagram of 8-1 multiplexer design logic data sheet decoder 3 to 8 demultiplexer 3 16 ttl pin diagram 14 demultiplexer SSOP16