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    DSASW00222503.pdf by Lattice Semiconductor

    • LatticeECP3 Marvell 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability December 2009 Technical Note TN1196 Introduction This technical note describes a 1000BASE-X physical/MAC layer Gigab
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    1000BASE-X 100BASE-FX 88E-1112 88e111 88E111* HWCFG_MODE 88E1111 88E1111 "mdio registers" 88e1111 alaska ultra reference design 88E1111 APPLICATION 88E1111 application note 88E1111 config 88E1111 datasheet register map 88E1111 full 88E1111 GMII config 88E1111 jumbo 88E1111 jumbo GMII 88E1111 mac address 88e1111 mii 88E1111 padding 88E1111 PHY 88E1111 PHY register map 88E1111 PHY registers 88E1111 PHY registers map 88E1111 register 88E1111 register map 88E1111 registers 88E1111 RGMII 88E1111 RGMII config 88E1111 set to RGMII mode 88E1111 SFP application note 88e1111 SGMII mode 88E1111-phy datasheet 88E1112 88E1112 design 88E1112 devices 88E1112 register 88E1112 RGMII 88E1112 sfp application 88E1111 ECP3-95-1156 Marvell 88e111 marvell 88e111 alaska reference design Marvell 88E1111 Marvell 88E1111 100base-fx marvell 88e1111 application design note Marvell 88E1111 application note Marvell 88e1111 register map marvell 88E1111 register RGMII Marvell 88E1111 specification Marvell 88E1112 Marvell 88E1112 100base-fx marvell ethernet switch mii marvell ethernet switch sgmii marvell phy Marvell PHY 88E111 alaska Marvell PHY 88E1111 Marvell PHY 88E1111 alaska Marvell PHY 88E1111 alaska register map Marvell PHY 88E1111 application note Marvell PHY 88E1111 MDIO read write Marvell PHY 88E1111 MDIO read write sfp Marvell PHY 88E1111 register map Marvell PHY 88E1111 reset Marvell PHY 88E1112 Marvell PHY 88E1112 SFP Marvell PHY register map programming 88E1111 RGMII to fiber 88e1111 register sfp pins sgmii SerDes sfp configuration switch SGMII MII GMII TN1196
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