DSA00305652.pdf
by Cypress Semiconductor
-
CY7C1328F
4-Mb (256K x 18) Pipelined DCD Sync SRAM
Functional Description[1]
Features
· Registered inputs and outputs for pipelined operation
· Optimal for performance (Double-Cycle deselect)
-
Original
-
Unknown
-
Unknown
-
Unknown
-