DSA0034380.pdf by Lattice Semiconductor

Partial File Text TM ispGDXV, ispGDXx and ispGDSx Architectural Description TM TM arrays on ispGDX devices. Control signals for OEs, Clocks and MUX Controls must come from designated sets of I/O pins.
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
Price & Stock Find it at Findchips.com

DSA0034380.pdf preview Download Datasheet