The recommended power-up sequence is to apply VDD first, followed by VDDIO, and then the clock signal. This ensures that the internal voltage regulators are powered up correctly.
The WM8962 can be configured using the I2C interface. The device has several registers that control the audio settings, such as gain, mute, and routing. Refer to the datasheet for the register map and configuration details.
The maximum input signal level that the WM8962 can handle is 2.2Vrms. Exceeding this level may result in distortion or damage to the device.
To optimize the WM8962 for low power consumption, use the power-down modes, reduce the clock frequency, and adjust the voltage regulators. Additionally, use the dynamic biasing feature to reduce power consumption during idle periods.
The recommended layout and routing for the WM8962 involves keeping the analog and digital signals separate, using a solid ground plane, and minimizing the length of the clock signal traces. Refer to the datasheet for more detailed layout and routing guidelines.
WM8962BECSN/R datasheet
by Cirrus Logic
