TPS3600D20PW datasheet by Texas Instruments

TPS3600D20PW Frequently Asked Questions (FAQs)

• What is the recommended PCB layout for optimal thermal performance?
  Texas Instruments recommends a 2-layer PCB with a solid ground plane on the bottom layer and a thermal relief pattern on the top layer to minimize thermal resistance. A minimum of 2 oz copper thickness is recommended for the top layer.
• How do I ensure accurate voltage sensing with the TPS3600D20PW?
  To ensure accurate voltage sensing, it's essential to use a Kelvin connection (separate force and sense lines) and to keep the sense lines as short as possible. Additionally, the sense lines should be routed away from high-current paths and noisy areas of the board.
• What is the maximum allowed voltage drop across the sense resistors?
  The maximum allowed voltage drop across the sense resistors is 100 mV. Exceeding this limit can lead to inaccurate voltage sensing and potentially cause the device to malfunction.
• How do I handle the device's power-on reset (POR) and brown-out reset (BOR) functions?
  The TPS3600D20PW has an internal POR and BOR circuitry. To handle these functions, ensure that the input voltage ramps up slowly (typically 10 ms to 100 ms) during power-on, and that the system design can tolerate the device's reset timing (typically 10 ms to 20 ms).
• What is the recommended input capacitor value and type for the TPS3600D20PW?
  Texas Instruments recommends using a low-ESR ceramic capacitor with a value between 1 μF and 10 μF, depending on the specific application requirements. The capacitor should be placed as close as possible to the device's input pins.