TMS320DM368ZCE datasheet by Texas Instruments

TMS320DM368ZCE Frequently Asked Questions (FAQs)

• What is the recommended power-on sequence for the DM368?
  The recommended power-on sequence is to apply power to the DVDD and CVDD pins first, followed by the AVDD and DVDDIO pins. This ensures that the internal voltage regulators are powered up correctly.
• How do I configure the clock settings for the DM368?
  The clock settings can be configured using the Clock Enable Register (CKEN) and the Clock Divider Register (CKDIV). The CKEN register enables or disables the clock for each module, while the CKDIV register sets the clock divider ratio for each module.
• What is the maximum frequency of the ARM926EJ-S core?
  The maximum frequency of the ARM926EJ-S core is 432 MHz. However, the actual operating frequency may be lower depending on the system design and operating conditions.
• How do I use the Video Processing Subsystem (VPSS) on the DM368?
  The VPSS can be configured using the VPSS registers and the Video Input/Output (VIO) module. The VPSS supports various video interfaces, including ITU-R BT.656, ITU-R BT.1120, and HDMI. The VIO module provides additional video processing capabilities, such as scaling, cropping, and color space conversion.
• What is the purpose of the External Memory Interface (EMIF) on the DM368?
  The EMIF provides a 16-bit or 32-bit wide interface to external memory devices, such as SDRAM, DDR, or flash memory. The EMIF supports various memory types and configurations, and can be used to expand the system's memory capacity or to interface with external peripherals.