A high-quality, low-jitter clock source is recommended, such as a crystal oscillator or a clock generator IC. The clock source should be able to provide a stable clock signal with a frequency of 256x or 512x the desired audio sampling rate.
The PCM2901E/2K can be configured for master or slave mode by setting the M/S pin high or low, respectively. In master mode, the device generates the clock signal, while in slave mode, it receives the clock signal from an external source.
The maximum cable length for the I2S interface depends on the clock frequency and the signal quality. As a general rule, the cable length should be kept as short as possible, but a length of up to 10 inches (25 cm) is typically acceptable. It's recommended to use a shielded cable and to terminate the lines properly to minimize signal degradation.
The PCM2901E/2K supports various digital audio data formats, including I2S, MSB-justified, and LSB-justified. The device can be configured to receive or transmit data in one of these formats by setting the appropriate pins and registers. It's essential to ensure that the data format matches the requirements of the connected audio codec or DSP.
The power consumption of the PCM2901E/2K depends on the operating mode, clock frequency, and supply voltage. According to the datasheet, the typical power consumption is around 30-40 mA in active mode and 10-20 mA in standby mode. However, the actual power consumption may vary depending on the specific application and usage.
PCM2901E/2K datasheet
by Texas Instruments
