The recommended power-up sequence is to apply VCC first, followed by VREF, and then the analog and digital inputs. This ensures proper device operation and prevents latch-up.
The analog input filter should be designed to reject noise and aliasing. A 3rd-order Butterworth filter with a cutoff frequency of 10 kHz to 20 kHz is recommended. The filter should also be designed to match the impedance of the analog input.
The recommended clock frequency is 256 fs (where fs is the sampling frequency). This ensures that the device operates within its specified performance parameters.
Clock jitter can be minimized by using a high-quality clock source, such as a crystal oscillator. The clock signal should also be filtered to remove high-frequency noise. Additionally, the device's internal clock multiplier can be used to reduce the effects of clock jitter.
The maximum input signal level is 2.2 Vrms. Exceeding this level can result in distortion and decreased performance.
PCM2900E datasheet
by Texas Instruments
