The recommended power-on sequence is to apply VCC first, followed by VDD, and then the analog power supplies (VAA and VDA). This ensures that the internal voltage regulators are powered up correctly.
To configure the PCM2706PJT for master mode operation, set the MCLK pin to the desired clock frequency, and then set the BCLK and LRCK pins to the desired bit clock and frame clock frequencies, respectively. Additionally, set the MODE pin to a logic high to enable master mode.
The maximum allowed capacitance for the analog output filters is 220nF. Exceeding this value may affect the stability of the output stage.
To optimize the PCB layout for the PCM2706PJT, keep the analog and digital power supplies separate, use a solid ground plane, and keep the analog output traces as short as possible. Additionally, use a common mode filter on the analog output lines to reduce EMI.
The recommended clock jitter tolerance for the PCM2706PJT is 500ps. Exceeding this value may affect the audio quality.
PCM2706PJT datasheet
by Texas Instruments
