The recommended power-up sequence is to apply VCC first, followed by AVDD, and then DVDD. This ensures that the internal voltage regulators are powered up in the correct order.
To optimize the analog input circuitry, use a low-pass filter with a cutoff frequency below 20 kHz to remove high-frequency noise, and use a buffer amplifier with a high input impedance to minimize loading on the source.
The maximum allowed input voltage on the analog input pins is 2.5V, which is the same as the analog supply voltage (AVDD). Exceeding this voltage may damage the device.
To ensure proper clock synchronization, use a common clock source for both the PCM1808 and the downstream digital signal processor, and ensure that the clock signals are properly buffered and terminated to prevent signal degradation.
To minimize noise and interference, use a multi-layer PCB with a dedicated ground plane, keep analog and digital signals separate, and use shielding and filtering to reduce electromagnetic interference (EMI).
PCM1808PWRG4 datasheet
by Texas Instruments
