PCM1795DBR datasheet by Texas Instruments

PCM1795DBR Frequently Asked Questions (FAQs)

• What is the recommended power-up sequence for the PCM1795DBR?
  The recommended power-up sequence is to apply VCC first, followed by AVCC, and then DVCC. This ensures that the internal voltage regulators are powered up correctly.
• How do I optimize the analog output stage for best performance?
  To optimize the analog output stage, use a low-pass filter with a cutoff frequency of around 100 kHz to remove high-frequency noise. Also, use a high-quality op-amp with low noise and distortion, and ensure the output stage is properly biased.
• What is the maximum clock frequency that can be used with the PCM1795DBR?
  The maximum clock frequency is 128 fs (384 kHz), but it's recommended to use a clock frequency of 128 fs or lower to ensure optimal performance and minimize jitter.
• How do I handle the digital output data format?
  The PCM1795DBR outputs data in a 24-bit, MSB-first, two's complement format. Ensure that your receiving device is configured to accept this format, and that you're handling the data correctly in your application.
• What is the recommended layout and routing for the PCB?
  Keep analog and digital signals separate, use a solid ground plane, and avoid routing digital signals near the analog output stage. Also, use a low-ESR capacitor for the AVCC and DVCC power supplies.