The recommended power-up sequence is to apply VCC first, followed by VDD, and then the digital power supply (VDDIO). This ensures that the internal voltage regulators are powered up correctly.
To configure the PCM1772PWR for master clock mode, set the MCLK pin to the desired clock frequency (typically 256x or 512x the sample rate) and set the BCK pin to the desired bit clock frequency. The device will then generate the LRCK signal internally.
The maximum allowed capacitance on the VCC and VDD pins is 10uF. Exceeding this value may cause power-up issues or affect the device's performance.
To optimize the PCB layout for the PCM1772PWR, keep the analog and digital power supply traces separate, use a solid ground plane, and place the device close to the analog power supply decoupling capacitors. Also, ensure that the clock signals are routed away from the analog signals to minimize noise coupling.
The recommended operating temperature range for the PCM1772PWR is -40°C to 85°C. Operating the device outside this range may affect its performance or reliability.
PCM1772PWR datasheet
by Texas Instruments
