The recommended power-on sequence is to apply VDD first, followed by VBAT. This ensures that the internal voltage regulator is enabled before the battery voltage is applied.
The PCF8536BT/1,118 is configured for I2C communication by default. However, the SCL and SDA pins must be connected to the I2C bus, and the device address must be set using the A0, A1, and A2 pins.
The maximum clock frequency for the I2C interface is 400 kHz.
The PCF8536BT/1,118 can be reset by applying a low signal to the RST pin or by performing a software reset using the I2C interface.
The VBAT pin is used to connect a battery or a supercapacitor to store data in the device's RAM during power-down or battery replacement.