N74F112D-T datasheet by NXP Semiconductors

Description Dual J-K negative edge-triggered flip-flop - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; F<sub>max</sub>: 100 MHz; Logic switching levels: TTL ; Number of pins: 16 ; Output drive capability: -1/+20 mA ; Propagation delay: 5 ns; Voltage: 4.5-5.5 V
Datasheet Type Original
RoHS Yes
Pb Free Unknown
Lifecycle Obsolete
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Equivalent Parts !
Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.

I74F112D,602 MC74F112D SN74F112DRE4 933861300623 N74F112D,623

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