The maximum clock frequency of the LPC2132FBD64,151 is 60 MHz.
The oscillator can be configured using the PLL0CFG and PLL1CFG registers. The PLL0CFG register is used to configure the PLL0, which is the main clock source, while the PLL1CFG register is used to configure the PLL1, which is used for the USB interface.
The VPB pin is used to bypass the internal voltage regulator and connect an external voltage source to the internal circuitry. This is useful when an external voltage regulator is used to power the microcontroller.
The ADC on the LPC2132FBD64,151 is a 10-bit successive approximation ADC. It can be configured using the ADCR register, and the conversion result can be read from the ADGDR register.
The BOD is used to detect when the voltage supply to the microcontroller drops below a certain threshold. When this happens, the BOD generates a reset signal to reset the microcontroller.