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    Part Img LPC1313FBD48/01 datasheet by NXP Semiconductors

    • LPC1311/13/42/43 User manual
    • Original
    • Unknown
    • Unknown
    • Active
    • 3A991.A.2
    • 8542.31.00.01
    • 8542.31.00.00
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    LPC1313FBD48/01 datasheet preview

    LPC1313FBD48/01 Frequently Asked Questions (FAQs)

    • The maximum operating frequency of the LPC1313FBD48/01 is 72 MHz, but it can be overclocked to 80 MHz with some limitations.
    • The internal oscillator on the LPC1313FBD48/01 can be configured using the SYSCON registers. Specifically, the SYSOSCCTRL register controls the oscillator frequency, and the SYSOSCSTAT register provides status information about the oscillator.
    • The maximum amount of current that the LPC1313FBD48/01 can source or sink on its GPIO pins is 4 mA per pin, with a total limit of 100 mA for all GPIO pins combined.
    • The ADC on the LPC1313FBD48/01 is a 10-bit successive approximation ADC. It can be configured using the ADC registers, and the ADC conversion result can be read from the ADCRDR register. The ADC can be triggered by a software command or by an external event.
    • The BOOTLOADER pin on the LPC1313FBD48/01 is used to select the boot mode of the device. When the pin is pulled low during reset, the device boots from the internal ROM bootloader. When the pin is pulled high or left floating, the device boots from the user flash memory.
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