A good PCB layout for the LMP90080QMH involves keeping the analog and digital grounds separate, using a solid ground plane, and placing the device close to the analog signal sources. Additionally, it's recommended to use a 4-layer PCB with a dedicated power plane and a dedicated ground plane.
To ensure proper powering and decoupling of the LMP90080QMH, use a high-quality, low-ESR capacitor (e.g., 10uF) between the AVDD and AGND pins, and another capacitor (e.g., 100nF) between the DVDD and DGND pins. Also, use a 1uF capacitor between the AVDD and DVDD pins to decouple the analog and digital power supplies.
The LMP90080QMH can handle input voltages up to 5.5V, but it's recommended to keep the input voltage below 5V to ensure optimal performance and prevent damage to the device.
To optimize noise performance, configure the LMP90080QMH in a differential input configuration, use a high-impedance input source, and keep the input signal paths as short as possible. Additionally, use a common-mode filter capacitor (e.g., 10nF) between the VIN+ and VIN- pins to reduce common-mode noise.
The recommended clock frequency for the LMP90080QMH is between 1MHz and 50MHz, with a typical frequency of 10MHz. However, the device can operate at frequencies up to 100MHz with reduced performance.
LMP90080QMH/NOPB datasheet
by Texas Instruments
