The maximum operating frequency of the CY7C63743C-QXC is 67 MHz.
The CY7C63743C-QXC can be configured for I2C or SPI mode by setting the MODE pin high or low during power-up. For I2C mode, the MODE pin should be tied to VCC, and for SPI mode, it should be tied to GND.
The maximum data transfer rate of the CY7C63743C-QXC is 67 Mbps.
The CY7C63743C-QXC supports clock stretching, which allows the slave device to slow down the clock speed. To handle clock stretching, the master device should monitor the SCL line and wait for the slave device to release the clock line before proceeding with the transfer.
The power consumption of the CY7C63743C-QXC depends on the operating frequency and mode. In I2C mode, the typical power consumption is 10 mA at 3.3V and 67 MHz. In SPI mode, the typical power consumption is 15 mA at 3.3V and 67 MHz.
CY7C63743C-QXC datasheet
by Cypress Semiconductor
