CY7C1550V18-333BZC datasheet by Cypress Semiconductor

Description 72-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II+ CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
Datasheet Type Original
RoHS No
Pb Free Unknown
Lifecycle Obsolete
Price & Stock
Powered by Findchips

Equivalent Parts !
Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.

CY7C1550V18-333BZXC CY7C1550V18-333BZXI UPD44646362F5-E30-FQ1-A

CY7C1550V18-333BZC datasheet preview

Download Datasheet