CY7C1350G-133AXIT datasheet by Cypress Semiconductor

Description 4-Mbit (128K x 36) Pipelined SRAM with NoBL Architecture; Architecture: NoBL, Pipeline; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V
Datasheet Type Original
RoHS Yes
Pb Free Yes
Lifecycle Transferred
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CY7C1350G-133AXI CY7C1350G-133AXI

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