CY7C1243V18-333BZXC datasheet by Cypress Semiconductor

Description 36-Mbit QDR -II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: QDR-II+, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
Datasheet Type Original
RoHS Yes
Pb Free Yes
Lifecycle Obsolete
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CY7C1243V18-333BZI CY7C1243V18-333BZC CY7C1243V18-333BZXI

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