The recommended power-up sequence is to apply VCC first, followed by VDD, and then the clock signal. This ensures proper initialization and prevents latch-up conditions.
The clock input can be configured as a crystal oscillator or an external clock source. For crystal oscillator mode, connect a crystal between XIN and XOUT pins, and for external clock mode, connect the clock signal to the XIN pin and leave XOUT pin open.
The VDD pin is the power supply pin for the analog circuitry, including the PLL and clock generation. It should be connected to a separate power supply or filtered version of the main power supply (VCC) to minimize noise and ensure proper operation.
To implement SSC, set the SSC_EN bit in the Clock Control Register (CCR) to '1'. Then, program the SSC frequency modulation parameters using the SSC_FREQ_MOD and SSC_FREQ_MOD_STEP registers. The device will then generate a spread spectrum clock output.
The maximum clock frequency supported by the CY22800FXC is 266 MHz. However, the actual clock frequency may be limited by the specific application, PCB layout, and clock signal quality.