The recommended operating voltage range for CD74HC123PWR is 2V to 6V.
To ensure proper power sequencing, apply power to the VCC pin before applying any input signals, and ensure that the input signals are stable before applying clock signals.
The maximum clock frequency supported by CD74HC123PWR is 25 MHz.
The reset pin (MR) is active-low, so it should be tied to VCC through a pull-up resistor or connected to a logic high signal to ensure proper operation.
The output enable (OE) pin is used to enable or disable the output of the flip-flop. When OE is low, the output is enabled, and when OE is high, the output is disabled (high-impedance state).
CD74HC123PWR datasheet
by Texas Instruments
