The recommended layout and routing for the ADS8517IBDW involves keeping the analog and digital grounds separate, using a solid ground plane, and minimizing the length of the analog input traces. It's also recommended to use a 4-layer PCB with a dedicated analog power plane and a dedicated digital power plane.
To optimize the performance of the ADS8517IBDW in noisy environments, use a low-pass filter at the input, use a shielded cable for the analog input, and consider using a common-mode filter or a differential amplifier to reject common-mode noise.
The maximum sampling rate of the ADS8517IBDW is 250 kSPS, but it can be reduced to 125 kSPS or 62.5 kSPS to reduce power consumption or improve noise performance.
The ADS8517IBDW has an internal calibration circuit that can be enabled by setting the CAL pin high. The calibration process involves shorting the analog input to the internal reference voltage and then adjusting the offset and gain to achieve the desired accuracy.
The power consumption of the ADS8517IBDW depends on the sampling rate and the voltage supply. At 250 kSPS and 3.3 V supply, the typical power consumption is around 35 mW. At 125 kSPS and 3.3 V supply, the typical power consumption is around 20 mW.
ADS8517IBDW datasheet
by Texas Instruments
