The recommended power-up sequence is to apply VCC first, followed by VREF, and then the clock signal. This ensures proper initialization of the device.
The BUSY signal goes high during conversion and remains high until the conversion is complete. The host should wait for BUSY to go low before accessing the data.
The maximum frequency of the clock signal is 3.25 MHz. Exceeding this frequency may result in incorrect conversions or device malfunction.
The gain of the ADS7846E can be configured using the GAIN[1:0] pins. The gain settings are: 00 = 1x, 01 = 2x, 10 = 4x, and 11 = 8x.
The VREF pin is the reference voltage input for the ADC. It should be connected to a stable voltage source between 2.5V and 5V, depending on the desired full-scale input range.