DSA00504739.pdf by Nanya Technology

Partial File Text N2DS51280CS 512Mb DDR SDRAM C-Die Features · DDR 512M bit, Die C, based on 90nm design rules · Double data rate architecture: two data transfers per clock cycle · Bidirectional data strobe (DQS) is t
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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