DSA00163712.pdf by Cypress Semiconductor

Partial File Text CY7C1370B CY7C1372B 512K × 36/1M × 18 Pipelined SRAM with NoBL Architecture Features · Zero Bus Latency, no dead cycles between Write and Read cycles · Fast clock speed: 200, 167, 150, and 133 MH
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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