DSA00163894.pdf by Cypress Semiconductor

Partial File Text FastEdgeTM Series CY2DP314 1 of 2:4 Differential Clock/Data Fanout Buffer Features · Four ECL/PECL differential outputs · One ECL/PECL differential or single-ended inputs (CLKA) · One HSTL differ
Datasheet Type Original
RoHS No
Pb Free No
Lifecycle Obsolete
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CY2DP314OXIT

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