DSA00164128.pdf by Cypress Semiconductor

Partial File Text PRELIMINARY CY7C1422AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features · 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36) · 300-MHz clock for high band
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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